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High Performance AES IP Cores

The Advanced Encryption Standard (AES), standardized by NIST in 2001 and approved by NSA for classified data, is at the heart of almost all modern data security protocols. With approaching 100 design-ins across a range of target FPGA technologies, Algotronix' Advanced Encryption Standard IP cores offer a well proven and competitively priced solution. Algotronix AES cores have been selected by many of the largest defense electronics companies and have been deployed by four NATO countries.

Algotronix' high performance AES IP cores use a 128 bit wide internal data path coupled with pipelining and parallelism to deliver extremely high throughput.
The encryption cores are supplied as a complete package of VHDL or Verilog source code. The IP cores can be targeted at FPGAs from Xilinx, Altera and Microsemi. Source code reduces the cost and complexity of a security audit. It allows customers to confirm that no virus or Trojan code is incorporated and that it cannot be forced into unauthorised states or operations. This can significantly reduce the cost and time to conduct a security audit.
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Pipelined AES G3 for Video
Pipelined AES G3 for Video
Price: $12,000.00

Pipelined G3 Advanced Encryption Standard (AES) Core with pixel interface for encrypting uncompressed high data rate video. more info
AES Core XTS
AES Core XTS
Price: $14,000.00

AES XTS  Mode (XTS-AES)  IP Core for storage encryption implementing IEEE 1619-2007 and NIST Draft SP800-38E. more info
AES Core GCM for 10Gbit/sec packet data
AES Core GCM for 10Gbit/sec packet data
Price: $16,000.00

Performance optimised AES-GCM core implementing AES-GCM as required by IEEE 802.1 MACSEC, configurable to use 128 or 256 bit key and 96 bit IV.  Core achieves 10Gbit/sec performance under worst case traffic conditions on a Xilinx Virtex 5 FPGA. more info
Duplex AES-GCM at 10Gbit/sec for OTN
Duplex AES-GCM at 10Gbit/sec for OTN
Price: $20,000.00

This state of the art implementation of the AES-GCM algorithm provides privacy and authentication and achieves 10Gbit/sec performance under worst case traffic conditions on modern Xilinx FPGAs with a clock frequency of 156.25MHz.
more info
AES-GCM IP Core for 40Gbit/sec packet data
AES-GCM IP Core for 40Gbit/sec packet data
Price: $20,000.00

Performance optimised AES-GCM core implementing AES-GCM as required by IEEE 802.1 MACSEC with fixed 128 bit key and 96 bit IV.  Core achieves 40Gbit/sec performance on a Xilinx Virtex 5 FPGA. more info
Ultra high performance AES-GCM  for OTN networks
Ultra high performance AES-GCM for OTN networks
Price: $30,000.00

This state of the art implementation of the AES-GCM algorithm provides privacy and authentication and can be configured for performance between 25 and 400Gbit/sec performance on modern FPGA devices. The main application is expected to be securing 100Gbit/sec OTN networks.
more info