New MACSEC IP core implements IEEE 802.1ae standard for secure ethernet. Datasheet available for download (registration required) .
Security IP Cores and Services
With around 100 design-ins across a range of target FPGA technologies Algotronix' Advanced Encryption Standard cores offer a well proven and competitively priced solution. Algotronix AES cores have been selected by many of the largest defense electronics companies and have been deployed by four NATO countries.
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The MACSEC core is a high performance pipelined implementation of IEEE standard 802.1ae. The core is built on Algotronix' pipelined implementation of the AES-GCM encryption algorithm which itself builds on our G3 AES core.
This state of the art implementation of the AES-GCM algorithm provides privacy and authentication and achieves 10Gbit/sec performance under worst case traffic conditions on modern Xilinx FPGAs with a clock frequency of 156.25MHz.