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Security IP Cores and Services

With more than 20 customers and design-ins across a range of target FPGA technologies Algotronix' Advanced Encryption Standard cores offer a well proven and competitively priced solution. Algotronix AES cores have been selected by many of the largest defense electronics companies and have been deployed by four NATO countries.

Our unique DesignTag system allows labelling of the bitstream within an operating FPGA for intellectual property protection or version control purposes. DesignTag consists of a small, low power, IP core which is added to the design to be protected and DesignTag reader software and data logging hardware which senses the tag through the chip package and provides details of the protected product.



AES Core G2 DesignTag Project code

Our Price: (Members Only)

Price (Members Only)
G2 Advanced Encryption Standard (AES) Core with NIST validation certificate and 32 bit internal datapath width. DesignTag IP Core and Code to Tag an FPGA project