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Algorithms in Electronics

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New AES-XTS IP Core

New AES IP core implements the XTS-AES algorithm used in the IEEE 1619-2007 and NIST SP800-38E standards for encrypted data storage. .
 
 
 
 
Product Index
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AES-CORE-CCM   AES Core CCM
AES-DEMO   AES Core Demonstration Bitstream
AES-CORE-G2   AES Core G2
AES-CORE-G3   AES Core G3
AES-CORE-GCM   AES Core GCM
AES-CORE-GCM-10G   AES Core GCM for IEEE 802.1 MACSEC at 10Gbit/sec
AES-CORE-XTS   AES Core XTS
AES-ALTERA-REF   AES G3 Reference Design for Altera NIOS Processor
AES-XILINX-REF   AES G3 Reference Design for Xilinx Processors
AES-CORE-KEYWRAP   AES Keywrap Core
TAG-CODE   DesignTag Project code
TAG-READER   DesignTag Reader Software
TAG-EVAL   DesignTag Starter Kit (Xilinx Spartan)
AES-EXT-SUPP   Extend Design-In Support for 12 months
AES-LOWCOST-CCM   Low Cost AES CCM Core with fixed 32 bit data path
AES-LOWCOST-GCM   Low Cost AES GCM Core with fixed 32 bit data path width
AES-LOWCOST-KEYWRAP   Low cost AES Keywrap Core with fixed 32 bit data path width
AES-CORE-VIDEO   Pipelined AES G3 for Video

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