Algotronix Low Cost AES IP Cores
The Advanced Encryption Standard (AES), standardized by NIST in 2001 and approved by NSA for classified data, is at the heart of almost all modern data security protocols. With over 50 design-ins across a range of target FPGA technologies, Algotronix' Advanced Encryption Standard IP cores offer a well proven and competitively priced solution. Algotronix AES cores have been selected by many of the largest defense electronics companies and have been deployed by four NATO countries.
These low cost products offer attractive pricing and ease of use for typical designs whereas the more flexible advanced products can efficiently address a wider range of application requirements. The main technical difference between the low cost and advanced products is that the internal data path width in the low cost products is fixed at 32 bits whereas the advanced products offer selectable data path widths of 8, 16 , 32, 64 or 128 bits and in some cases support pipelining.
The encryption cores are supplied as a complete package of VHDL or Verilog source code. The IP cores can be targeted at FPGAs from Xilinx, Altera, Actel and Lattice as well as ASIC or even CPLD implementations. Source code reduces the cost and complexity of a security audit. It allows customers to confirm that no virus or Trojan code is incorporated and that it cannot be forced into unauthorised states or operations. This can significantly reduce the cost and time to conduct a security audit. Demonstration designs are available which show the cores working on low cost vendor evaluation boards.
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